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  d1306 ms pc b8-6145 no.a0600-1/8 any and all sanyo semiconductor products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. consult with your sanyo semiconductor representative nearest you before using any sanyo semiconductor products described or contained herein in such applications. sanyo semiconductor assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all sanyo semiconductor products described or contained herein. LA6579H overview the LA6579H is a 4-channel bridge (btl) driver for cd-r. functions ? bridge-connected (btl) power amplif ier incorporating four channels ? i o max 1a ? level shift circuit incorporated ? mute circuit (all circuits on/off) ? high output voltage (dynamic range) (6.5v : typ, ch1 only) ? input op-amp incorporated (ch1 only) ? input op-amp (ch1) selector function incorporated specifications maximum ratings at ta = 25 c parameter symbol conditions ratings unit v cc max *1 14 v supply voltage v cc _p* v cc p1, v cc p2 *1 14 v independent ic 0.8 w allowable power dissipation pd max specified board 1.8 w maximum input voltage v in b 13 v maximum output current i o max each output 1 a mute pin voltage vmute 13 v operating temperature topr -30 to +85 c storage temperature tstg -55 to +150 c * specified board size : 114.3 76.1 1.6mm 3 , glass epoxy. *1 note : connect power pins of v cc _s, v cc _p1 and v cc _p2 externally. recommended operating conditions at ta = 25 c parameter symbol conditions ratings unit supply voltage v cc 5 to 13 v monolithic linear ic for cd-r four-channel bridge (btl) driver orderin g numbe r : ena0600
LA6579H no.a0600-2/8 electrical characteristics at ta = 25 c, v cc _s = v cc _p1 = v cc _p2 = 8v, vref = 1.65v, mute = 3.3v unless especially specified. ratings parameter symbol conditions min typ max unit all blocks no-load current drain on 1 i cc -on all outputs on, mute:hi 30 45 ma no-load current drain on 2 i cc -off all channels on, mute:low 5 10 ma mute on voltage vmute-on mute *1 2 v mute off voltage vmute-off mute *1 0.5 v output amp block (btl-amp) (ch1) input amp offset voltage v off _op-amp ch1, input op-amp_a and b -50 50 mv output voltage v o 1 r l =8 *2 6.2 6.5 v input and output gain vg1 *3 5.4 6 6.6 times slew rate sr1 amp independent multiply 2 between outputs. *3 0.5 v/ s input op_amp output offset voltage v off 1 input op-amp_a and b -10 10 mv op-amp_sink op_sink input op-amp, sink current 2 ma op-amp_source op_source input op-amp, souece current 300 500 a [input op_amp changeover] input amp changeover voltage 1 v in 1-sw select ch1, input op-amp_b *5 1 0.5 v input amp changeover voltage 2 v in 1-sw select ch1, input op-amp_b *5 2 v output amp (ch2 to 4) output offset voltage v off 2 between + and ? outputs of each ch -50 50 mv output voltage v o 2 between each plus and minus outputs *2 5 5.4 v input and output gain vg2 *3 5.4 6 6.6 times slew rate sr2 amp independent multiply 2 between outputs. *3 0.5 v/ s 3.3v power supply 3.3 vreg output voltage 3.3vreg i o = 200ma 3.18 3.3 3.42 v reg-in sink current reg-in-sink base current of external pnp transistor 5 10 ma line regulation v o ln 6v v cc 12v, i o = 200ma 20 150 mv load regulation v o ld 5ma i o 200ma 50 200 mv note *1 : mute output on with hi and off with low (amp output off with hi impedance). operative for all channels. *2 : voltage at both ends of an 8 load inserted between outputs. h or l for input. output in the saturation condition. *3 : ch1 input op_amp at 0db (buffer) *4 : design guarantee value *5 : op-amp_a is operated when v in _sw is h. op-amp_b is operated when it is l. package dimensions unit : mm (typ) 3234b 15.2 (6.2) 0.25 0.3 0.1 (2.25) (0.8) 0.8 2.0 10.5 7.9 (4.9) 0.65 2.7 2.45 max heat spreader 1 14 15 28 sanyo : hsop28hc(375mil) pd max -- ta ambient temperature, ta ? c allowable power dissipation, pd max ? w 0 0.5 0.80 1 1.5 1.80 2.5 2 --30 --20 0 20 40 60 0.42 0.94 10 0 80 when mounted on a board independent ic specified board : 114.3 76.1 1.6mm 3 glass epoxy
LA6579H no.a0600-3/8 block diagram 1 2 3 4 5 6 7 fr 8 9 10 11 12 13 14 v in 1-a v in 1+a v cc p1 v o 1+ v o 1- v in 1_sw [h] : op-amp_a [l] : op-amp_b v o 2+ v o 2- fr v o 3+ v o 3- v o 4+ v o 4- v cc p2 v in 4 v in 4g v in 1 v in 1-b v in 1+b s-gnd v in 1-sw mute vrefin fr v cc s 3.3vreg regin v in 2g v in 2 v in 3g v in 3 28 27 26 25 24 23 22 fr 21 20 19 18 17 16 15 11k 33k mute 33k 11k 33k 11k 33k 11k h : on l : off level shift level shift level shift level shift power system gnd power system gnd signal system power supply signal system power supply all output on/off 3.3vreg (external pnp tr) [h] [l]
LA6579H no.a0600-4/8 pin functions pin no. symbol pin descriptions 1 v in 1-a ch1 input amp_a inverted input 2 v in 1+a ch1 input amp_a non-inverted input 3 v cc p1 ch1 and ch2 power stage power supply 4 v o 1+ output pin (+) for channel 1 5 v o 1- ch1 output pin (-) for channel 1 6 v o 2+ output pin (+) for channel 2 7 v o 2- output pin (-) for channel 2 8 v o 3+ output pin (+) for channel 3 9 v o 3- output pin (-) for channel 3 10 v o 4+ output pin (+) for channel 4 11 v o 4- output pin (-) for channel 4 12 v cc p2 ch3 and ch4 power stage power supply 13 v in 4 input pin for channel 4 14 v in 4g input pin for channel 4 (for gain adjustment) 15 v in 3 input pin for channel 3 16 v in 3g input pin for channel 3 (for gain adjustment) 17 v in 2 input pin for channel 2 18 v in 2g input pin for channel 2 (for gain adjustment) 19 regin external pnp transistor, base connection 20 3.3vreg 3.3vreg output pin, exter nal pnp transistor, collector connection 21 v cc s signal system gnd 22 vrefin reference voltage application pin 23 mute output on/off pin 24 v in 1_sw ch1 input op_amp changeover pin 25 s_gnd signal system gnd 26 v in 1+b ch1 amp_b non-inverted input pin 27 v in 1-b ch1 amp_b inverted input pin 28 v in 1 ch1 input pin, input op_amp output pin note : the center frame (fr) becomes gnd (p-gnd) for the power system. keep this at the minimum potential together with the si gnal gnd (s-gnd). short-circuit v cc _s (signal system power supply), v cc p1, and v cc p2 (output stage power supply) externally.
LA6579H no.a0600-5/8 mute, vref-sw relation of mute and vref-sw output mute ch1 ch2 ch3 ch4 h on l off *1 output to be hi impedance with output off. *2 mute operative for all channels. v in 1_sw and ch1 input op_amp v in 1_sw ch1 input op_amp h amp_a l amp_b on mute mute output amp l off h on outline of inputs and outputs input op_amp to be applied to ch1 only 0.5v 2v internal reference voltage (2.5v (typ)) external reference voltage v in 1-b v in 1-a v in 1-sw v in * vref-in v o 1+ v o 1- v in - v in + 11k 66k 66k 22k 22k 11k level shift
LA6579H no.a0600-6/8 pin description pin no. symbol pin function description equivalent circuit 28 27 26 18 17 16 15 14 13 v in 1 v in 1-b v in 1+b v in 2g v in 2 v in 3g v in 3 v in 4g v in 4 input input pin set the total gain with the gain of this input amp. 4 5 v o 1+ v o 1- output (ch1) output pin for channel 1 6 7 8 9 10 11 v o 2+ v o 2- v o 3+ v o 3- v o 4+ v o 4- output (ch2 to 4) ch2 to 4 output pins 23 mute mute on/off of corresponding ch output mute : h output on mute : l output off * output off when the mute pin is open (similarly to mute : l) 24 v in 1_sw ch1 input amp changeover ch1 input op-amp changeover function. amp_a or amp_b is selected according to the voltage applied to v in 1_sw. h : v in _a l : v in _b v cc v in *+ v in *- v in * s-gnd v cc 1 mute 100k 100k s-gnd v in 1_sw
LA6579H no.a0600-7/8 sample application circuit 1 2 3 4 5 6 7 fr 8 9 10 11 12 13 14 28 27 26 25 24 23 22 fr 21 20 19 18 17 16 15 v in 1-a v in 1+a m m v cc p1 v o 1+ v o 1- v o 2+ v o 2- fr v o 3+ v o 3- v o 4+ v o 4- v cc p2 v in 4 v in 4g v in 1 v in 1-b v in 1+b s-gnd v in 1-sw mute vrefin v cc s 3.3vreg regin v in 2g v in 2 v in 3g v in 3 sled input loading input spindle input focus input h : sled l : loading loading/sled spindle focus tracking tracking input fr v cc
LA6579H ps no.a0600-8/8 specifications of any and all sanyo semiconductor products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. sanyo semiconductor co., ltd. strives to supply high-quality high-reliability products. however, any and all semiconductor products fail with some probability. it is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. when designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. in the event that any or all sanyo semiconductor products (including technical data,services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of sanyo semiconductor co., ltd. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equipment, refer to the "delivery specification" for the sanyo semiconductor product that you intend to use. information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. sanyo semiconductor believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. this catalog provides information as of december, 2006. specifications and inform ation herein are subject to change without notice.


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